This paper presents a digital design flow in order to design high performance differential Emitter Coupled Logic (ECL) circuits efficiently. The proposed flow is similar to the ordinary digital CMOS ...

Often, when you are designing with high-speed ECL (emitter-coupled logic), you have too little time between clock cycles to implement logic functions using gates between flip‑flops. In these cases, ...

He traced it to a bad IC, which was bad news since it was a custom H-P part using emitter-coupled logic (ECL) to achieve the needed performance that can no longer be sourced.

The companyÕs line of timing and logic products now includes a family of translators for use in bridging devices with ECL I/O to LVDS I/O used in todayÕs CMOS ICs. Supporting OC-3 to OC-192 ...

Three new ultra-high speed logic devices have been added to the company's ECL Pro logic family—the ever-expanding ECL Pro logic family is said to offer an easy upgrade path from On Semiconductor ...

The material presented will cover the design requirements necessary to develop successfully functioning digital logic circuits. The lectures will cover combinatorial networks, the Eber-Moll Transistor ...

The VSC6431, VSC6432, VSC6433, and VSC6434 enable the bridging of devices with ECL I/O to LVDS I/O used in today's CMOS. All translators have both -2- and +3.3-V suppliesallowing DC coupling to both ...

Indeed, the gates already produced have larger voltage swings than emitter-coupled logic (ECL) gates – the fastest logic family that exists today. ECL gates are used for digital signal processing at ...

Note that Cybers used balanced ECL logic for speed, which meant using pairs of wires for each signal (usually each pair was a black and a white wire, but on the disk controllers they impressively used ...